Conventionally, an analog to digital converter (referred to as A/D converter hereafter), such as an analog to digital converter, or a digital to analog converter is used in many fields. In particular, an over-sampling type delta-sigma modulation A/D converter is widely used, because the converter is suitable for reducing circuit size, making a circuit into an Large Scale Integration (LSI) or increasing the operational speed of circuits. This type of A/D converter is generally referred to as a delta-sigma modulation A/D converter or a .DELTA.-.SIGMA. modulation A/D converter.
FIG. 1 shows a circuit diagram of a typical .DELTA.-.SIGMA. modulation A/D converter. In FIG. 1, an analog signal A to be quantized is applied to a first subtractor 71 through an input terminal 70. The first subtractor 71 carries out a subtraction operation between the analog signal A and a feedback signal B, which will be described later. A first subtraction signal C (C=B-A) obtained by the first subtractor 71 is applied to a first integrator 72.
The first integrator 72 carries out an integration operation for the first subtraction signal C. A first integration signal D obtained by the first subtractor 71 is applied to a second subtractor 73. The second subtractor 73 carries out a subtraction operation between the first integration signal D and the feedback signal B. A second subtraction signal E obtained by the second subtractor 73 is then applied to a second integrator 74. The second integrator 74 carries out an integration operation for the second subtraction signal E. A second integration signal F obtained by the second integrator 74 is applied to a quantizer 75. The quantizer 75 carries out a quantization operation for the second integration signal F.
The quantizer 75 has a comparator (not shown) for comparing the second integration signal F with a reference potential in every cycle of a clock signal G. The clock signal G is generated by a clock generator 76. The clock signal G has a frequency sufficiently higher than the highest frequency component of the analog signal A.
The clock signal G operates as a sampling signal for the quantizing operation carried out in the quantizer 75. The second integration signal F is sampled at a rate of the frequency of the clock signal G. A sampled instantaneous signal value of the second integration signal F obtained by the quantizer 75 is output to an output terminal 77 as a quantization signal H of the analog signal A as described later.
The sampled instantaneous signal value is applied to a delay circuit 78 so that the above-mentioned feedback signal B is obtained. The feedback signal B is fed back in the signal flow-path including the first and second integrators 72 and 74 and the quantizer 75. The sampled instantaneous signal values are integrated, re-sampled and again integrated to reduce quantizing noise in the feedback loop. Thus, the output H obtained from the quantizer 75 is converted to a one bit digital signal version.
Furthermore, the feedback signal B, i.e., the feedback sampled instantaneous signal value is influenced or modulated by the input analog signal A according to the subtraction operation of the first subtraction circuit 71. Thus, the one bit digital signal version output H also has a Pulse Code Modulation (PCM) or a Pulse Density Modulation (PDM) version of the analog signal A.
The .DELTA.-.SIGMA. modulator of FIG. 1 is so-called as a double integration type .DELTA.-.SIGMA. modulator. This type of .DELTA.-.SIGMA. modulator can be represented by an equivalent circuit as shown in FIG. 2, according to the Z-translation. In FIG. 2, circuit blocks 72z and 74z with the translation formula 1/(1-Z.sup.-1) correspond to the first and second integration circuits 72 and 74 of FIG. 1. A circuit block 75z with the translation formula Q(Z) corresponds to the quantizer 75 of FIG. 1. A circuit block 78z with the translation formula Z.sup.-1 corresponds to the delay circuit 78 of FIG. 1. According to the equivalent circuit of FIG. 2, an input analog signal X(Z) is converted to a digital output Y(Z). while a quantizing noise Q(Z) occurs in the quantizer circuit block 75z.
The equivalent circuit of FIG. 2 has a transfer function as below; EQU Y(Z)=X(Z)+(1-Z.sup.-1).sup.2 .multidot.Q(Z) (1)
Equation (1) represents that the digital output Y(Z) comprises a first component which responds to the analog signal X(Z) and a second component which corresponds to the quantizing noise Q(Z). The first component X(Z) has a uniform frequency response characteristic while the second component (1-Z.sup.-1).sup.2 .multidot.Q(Z) has a frequency response characteristic of which a response abruptly increases in response to the increase of the frequency. However, the second component (1-Z.sup.-1).sup.2 .multidot.Q(Z) is small in comparison to the first component X(Z), if the frequency of the clock signal G is sufficiently higher than the highest frequency component of the analog signal X(Z). Further, the second component (1-Z.sup.-1).sup.2 Q(Z) can be removed easily by using a low pass filter.
As described above, the double integration type .DELTA.-.SIGMA. modulator can quantize an analog signal theoretically with a very high quantizing accuracy. However, an A/D converter, such as the double integration type .DELTA.-.SIGMA. modulator, still has another noise problem. That is every circuit block of the A/D converter produces an internal noise, e g., thermal noise. An external noise, e.g., noise included in a power source (referred to as power source noise hereafter) for driving the A/D converter is also introduced in the A/D converter. Further, noise included in an analog signal to be quantized (referred to as signal source noise hereafter) is introduced in the A/D converter. These noises are processed in the same manner as an analog signal X(Z) to be quantized by the A/D converter. Thus, the noises, except the quantizing noise and the signal source noise, are very difficult to remove from the digital output Y(Z).